Acer 486 Manuel d'utilisateur télécharger pdf (Page 61)

Am486

Microprocessor PCI Customer Development Platform

2-31

IDE Hard Drive (L4 and M4)

The PCI CDP contains two standard 40-pin IDE connectors (parts J5 and J7). The

M1498 chip provides the IDE hard drive controller. For details on how to connect

a single IDE hard drive to the PCI CDP, see “Board Installation” on page 1-4.

An LED is located next to each IDE connector to indicate IDE activity. IDE devices

on connector J5 can generate interrupts on IRQ14, and devices on connector J7

can generate interrupts on IRQ15. This interrupt mapping can be changed by

reprogramming the chipset configuration registers.

Each connector supports one master and one slave device. If only one device is

attached to an IDE connector, that device must be configured as an IDE master. If

a two-position cable is used to attach two devices to a single IDE connector on the

board, one of the devices must be configured as an IDE master and the other as an

IDE slave. See each IDE device’s documentation for configuration details.

Keyboard (O1)

The PCI CDP provides a standard AT-compatible keyboard connector (part J1)

implemented via the chipset’s M5402 mouse/keyboard controller chip (part U79

at location D15).

Mouse (M1)

A port is provided for a PS/2-style mouse (connector J11). This device is driven

by the M5402 mouse/keyboard controller chip.

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Acer 486 Manuel d'utilisateur Page 61